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  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 7/847 IP Cores
    • T

    3.75GHz Clock generator with bandwidth shifting algorithm

    The power noise caused near to the PLL bandwidth considerably affects the PLL performance due to gain peaking. Therefore, it is strongly recommended to use an adaptive bandwidth PLL to switch bandwidth to lower the gain peaking under noisy environment. The proposed PLL checks whether the power noise frequency is near t..

    KS064H0275 | 2012-11-07

    • T

    4GHz DLL Based Clock Generator

    A DLL Based Clokc Generator that operates at 2GHz is introduced in this paper. The proposed method has a simple architecture with VCDL and combiner. The reference frequency is 500MHz. The Combiner can make maximum 4 times of reference clock freqency. Additionaly, when the clock is changed, the output clock has dithe..

    KS064H0272 | 2012-11-07

    • T

    2.7GHz 5000ppm Spread spectrum clock generator

    This is a 2.7GHz 5000ppm Spread Spectrum Clock Generator (SSCG) which is designed for DisplayPort version 1.2. An Electro-Magnetic Interference (EMI) can be reduced effectively in high-speed interface communications. In this SSCG, fundamentally fractional-N PLL is implemented for this EMI reduction effect. A designed S..

    KS064H0264 | 2012-11-07

    • 대학·연구소 IP
    • M
    • T

    3.5GHz 0.5%-3.5% Spread-Spectrum Clock Generator with a Memoryless Newton-Raphson Profile

    SSCG is usually used to reduce the electromagnetic interference (EMI) in high-speed digital systems. This SSCG can operate at 3.5 GHz, and it can support multi frequency deviations and multi modulation frequencies. It achieves more than 19dB peak reduction of output clock spectrum.

    KU064H0169 | 2011-07-01

    • 기업 IP
    • N
    • M
    • T
    • P

    80-300MHz Programmable Clock Generator

    The PM1130KAD is a low voltage, low cost, programmable clock generator for LCD / Digital video controller and JPEG systems. The PM1130KAD has charge pump PLL architecture with 8-bit pre-divider and 11-bit main divider. The PM1130KAD needs an external loop filter. The PM1130KAD gives customers both cost and space savi..

    KC014H0088 | 2009-11-19