14 bit / 256 byte Correctable BCH Code ECC Engine
This ECC engine is designed by BCH code architecture. The IP is composed by Syndrome calculator (SC), Key equation solver (KES) and Chien search (CS). Additionally, KES sharing and pipelining method are applied to the ECC engine.
This ECC engine can corrects bit error up to 14 bit / 256 byte, 12 bit / 64 byte for dat..
IEEE 802.11ad Multi-Mode LDPC Decoder
This IP provides a high-speed low-complexity LDPC decoder using min-sum based belief propagation layered decoding algorithm. The core advantage of layered decoder is the lesser iteration and consequently high throughput. LDPC codes have been widely used in a variety of communication systems. It is specifically imperati..
Reed-Solomon(255, 239) encoder/decoder
This IP provides a high-speed low-complexity Reed-Solomon (255, 239) encoder and decoder using pipelined degree-computationless modified Euclidean (pDCME) algorithm. Reed-Solomon (RS) codes have been widely used in a variety of communication systems, as well as in networking communications. The pDCME algorithm allows e..
Low Complexity Soft-Decision BCH Decoder using Hard-Decision Kernel
This IP provides a low-complexity soft-decision Bose-Chaudhuri-Hocquenghem (BCH) decoder architecture without iteration and its efficient design techniques. Specifically, soft-decision BCH has a test syndrome computation, which eliminates the test pattern generator, syndrome factor calculator based on m-SBS algorithm, ..
As one of the detecting & correcting error mechanisms which might occur during transmission, ECC (Error correction code) is accepted as an essential technology in communication and storage device. To keep up with the current performance requirement in the fields, Our company has developed and shares the fastest ECC eng..