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  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 6/850 IP Cores
    • 기업 IP
    • M
    • T

    SAR-ADC 12bit

    This IP is a 12-bit, 100kHzSPS analog-to-digital converter (ADC). The device operates from a supply range from 2.7V to 3.6V.Analog Input Range is VDD. The device includes a capacitor based SAR A/D converter with inherent sample and hold. The serial interface in each device is controlled by the SOC and Clock signals. T..

    KC022H1001 | 2019-11-19

    • 대학·연구소 IP
    • M

    high speed 12bit 32MSps ADC IP

    HS ADC는 12bit 32MS/s 동작을 위해 5단의 pipelined 구조로 되어있으며, SHA(sample-and-hold amplifier), 4개의 MDAC (multiplying digital-to-analog converter), 5개의 flash ADC, ECL(error correction logic), clock으로 구성 됨

    KR024H0977 | 2019-01-15

    • 기업 IP
    • N
    • M
    • T

    12bit 40M ADC

    This IP is a high speed, low power, small size dual channel analog-to-digital converter silicon IP. It provides 12-bit dynamic performance for sample rates up to 40 MSPS. The ADC support a differential input swing of up to 1.6 V peak-to-peak. Using a SAR topology, the IQADC converts to 12-bits resolution at 40MSPS at..

    KC193H0823 | 2016-08-30

    • 대학·연구소 IP
    • N
    • M
    • T

    3D_Vernier_TDC

    This work presents a fine-resolution time-to-digital converter (TDC) with a large dynamic range using a 3-D Vernier space. Despite the wide dynamic range, the required delay cells in the delay-lines are minimized, leading to better power efficiency. The proposed TDC also exploits the redundancy and error-correction tec..

    KU085H0773 | 2016-04-20

    • 기업 IP
    • M
    • T

    12bit 20MSPS ADC

    This ADC is 12-bit CMOS pinpelined A/D Converter. It receives analog input signal and decodes to digital output signal. Sampling rate is controlled by the clock input signal which is typical 20MHz.

    KC081H0507 | 2014-04-17