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Controller > Memory Controller > Mobile DDR Controller > LPDDR1
  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 1/850 IP Cores
    • 대학·연구소 IP
    • M

    LPDDR Memory controller

    The LPDDR SDRAM memory controller with the AHB interface is used to control LPDDR SDRAM devices. The LPDDR memory controller has AHB interface 128bit data width and controls dual x32 LPDDR SDRAM devices. All access timing parameter such as CAS latency, RAS-to-CAS delay, Refresh interval, etc., are programmable to suppo..

    KU195S0634 | 2015-04-04