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  • 대학·연구소 IP
  • N관련된 신규용역가능
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total: 9/850 IP Cores
    • 대학·연구소 IP
    • P

    High Resolution Analog-Digital Converter for Gas Sensor Interface

    This discrete-time 3rd order delta-sigma analog-digital converter is supplied by 3.3V, and shows 16bit resolution. The measured effective number of bits(ENOB) is 15bit. The sampling rate is 500kS/s. Digital control block is added to improve robustness of power variation of amplifier of delta-sigma ADC. High SNDR is ach..

    KU199H1081 | 2021-04-05

    • 대학·연구소 IP
    • P

    High Resolution Analog-Digital Converter for Gas Sensor Interface

    This discrete-time 3rd order delta-sigma analog-digital converter is supplied by 3.2V, and shows 16bit resolution. The measured effective number of bits(ENOB) is 13.2bit. The sampling rate is 500KS/s High SNDR is achieved by delta-sigma modulation, and this chip is based on TSMC 0.18um BCDMOS process. Die size is 1.17..

    KU296H1018 | 2019-11-28

    • 대학·연구소 IP
    • T

    14bit Inverter based low power Incremental ADC

    an inverter based low power 14-b incremental analog to digital converter(ADC) based on Sigma-Delta ADC in a 0.18um CMOS technology. The proposed incremental ADC comprises a 2nd-order feedforward structure and the 2nd-order modulator is consist of an inverter based integrators for the area and power efficiency. The simu..

    KU332H0846 | 2017-01-06

    • 대학·연구소 IP
    • N
    • M
    • T

    15bit Delta-Sigma (∑Δ) ADC

    Voltage-domain temperature sensors need an ADC that has both low-power consumption and high resolution. A sigma-delta (∑Δ) ADC is a suitable ADC for temperature sensors. Successive approximation register (SAR) ADCs have a merit in low-power consumption. However, a SAR ADC is not appropriate for temperature sensors b..

    KU085H0779 | 2016-04-20

    • 대학·연구소 IP
    • T

    A 24kHz BW 90dB SNDR Delta-Sigma Modulator with amplifier power reduction

    A 90dB SNDR 24kHz BW discrete-time delta-sigma modulator is designed in 180nm CMOS process. Applying the proposed amplifier assisting technique, the slew rate of amplifier is increased and the current requirement is relieved for stable integrator settling. One-bit quantizer is applied to avoid DAC linearity problem and..

    KU064H0716 | 2015-12-14