HDMI 2.1/DisplayPort 1.4a Combo Transmitter PHY
The SPPHHTG2S08 is the HDMI 2.1/DisplayPort 1.4a transmitter PHY. It is a companion PHY IP for the SPLOHTG2 HDMI 2.1/DisplayPort 1.4a transmitter controller IP or third-party controller IP. Its registers are recommended to be accessed from the controller IP or the interposer IP from the SOC through Alphasolutions' prop..
LPDDR5 16bit analog PHY Hard IP
- LPDDR5 analog PHY hard IP satisfying JESD209-5_3
SPDIF Rx Decoder
The SPDIF Rx supports digital audio input. SPDIF Rx is a digital audio interconnect used in consumer audio equipment over relatively short distances. The signal is transmitted over either a coaxial cable with RCA connectors or a fiber optic cable with TOSLINK connectors. SPDIF interconnects components in home theaters ..
MIPI D-PHY RX
This DPHY-RX is a high-frequency low-power, low-cost, source- synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY.
The IP is configured as a MIPI slave and consists of 5 lanes: 1 Clock lane and 4 data lanes, The High-Speed signals have a low voltage swing, while Low-Power signals have lar..
Low power 8Gbps SerDes
SerDes with 8.0Gbps data rate consists of 32-to-1 serializer, 1-to-32 de-serializer, and PLL with LC-VCO. This IP adopts an asynchronous system with embedded clock in serial data, and its IO interface uses a CML type. For BER test verification, loop back path and feed-forward path were inserted in IP and its function w..