Real-time JPEG-LS Encoder IP
The JPEGLS encoder IP supports lossless compression efficiency on a highly efficient hardware architecture. A single instantiation of the core can encode 4K UHDTV or higher rates, and synthesizes to less than 20,000 gates. It can be configured to parallel core mode and maximum 32 array core mode is supported.
KR054S0286 | 2012-11-27