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1.2V POR
Power-On Reset (POR) 1.2V IP provides a fixed-width reset pulse to initialize the chip after supply power (1.2V).
When the supply power is applied to 1V, the reset signal is output. Hysteresis of threshold voltage is 50mV, and assertion delay is 20us.
POR 3.3V IP has low power operation characteristics of 2uA.
KC639H1114 | 2021-11-26
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POR 0.9V
Power-On Reset (POR) 0.9V IP provides a fixed-width reset pulse to initialize the chip after supplying power (0.9V).
When the supply power is applied to 0.6V, the reset signal is output. Hysteresis of threshold voltage is 50mV, and assertion delay is 50us.
POR 0.9V IP has low power operation characteristics of 2uA.
KC639H1100 | 2021-11-10
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POR 1.8V
Power-On Reset (POR) 1.8V IP provides a fixed-width reset pulse to initialize the chip after supplying power (1.8V).
When the supply power is applied to 1V, the reset signal is output. Hysteresis of threshold voltage is 100mV, and assertion delay is 50us.
POR 1.8V IP has low power operation characteristics of 3uA.
KC639H1099 | 2021-11-10
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POR
The power on reset consists of a Schmitt trigger and simple logic for forced reset input, which
is forced asynchronous reset. Output port is, that means it is high to set flip-flop in particular state
KC022H1008 | 2019-11-19
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BOD
This IP is a CMOS voltage detector for battery-powered applications. The device includes a comparator, a low-current reference, a divider, a hysteresis circuit, and an output driver.
During operation, the output (BOD_Reset) remains in the logic-high state as long as AVDD is greater than the specified threshold volta..
KC022H1003 | 2019-11-19