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Analog & Mixed Signal
  • 기업 IP
  • 대학·연구소 IP
  • N관련된 신규용역가능
  • M수정/가공 판매가능
  • T기술지원 가능
  • P현 상태로만 판매가능
total: 373/847 IP Cores
    • 기업 IP
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    32.768KHz RCOSC

    The RCOSC 32.768KHz IP belongs to a family of digital controlled RC oscillators optimized for ultra low power applications. IP is a low power high resolution RC oscillator nominally operates at 32.768 KHz output clock from a 1.2 V supply. No external components are required. This family uses an RC dependent oscil..

    KC639H1119 | 2021-11-26

    • 기업 IP
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    8Ch 10Bit GPADC

    This IP is the GPADC for TSMC 130nm MSRF G process. The operating temperature is -40 to 125 degrees. The resolution of ADC is 10Bit. The input supports 8 channels, with a maximum conversion rate of 10 MS/s. DNL and INL are less than ± 1 LSB and turn-on time is less than 10us.

    KC639H1115 | 2021-11-26

    • 기업 IP
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    1.2V POR

    Power-On Reset (POR) 1.2V IP provides a fixed-width reset pulse to initialize the chip after supply power (1.2V). When the supply power is applied to 1V, the reset signal is output. Hysteresis of threshold voltage is 50mV, and assertion delay is 20us. POR 3.3V IP has low power operation characteristics of 2uA.

    KC639H1114 | 2021-11-26

    • 기업 IP
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    DCDC 1A

    The DCDC 1A is an ultra fast response, high output current(1A), step down switched DC-DC regulator IP. It is the best supply solution for high power power digital cores with fast activity variation. Specially designed for SoC integration it uses advanced control techniques to achieve soft start-up, transient respons..

    KC639H1111 | 2021-11-10

    • 기업 IP
    • N
    • M
    • T

    PLL 3G

    The PLL 3G IP is Clock Generator PLL that Widely programmable fractional-N delta sigma frequency synthesizer. PLL 3G uses only RVT device to provide a clock with a maximum frequency of 3.5GHz. It contains a 1-64 divider at the reference clock input, a 16-2000(Integer Mode) divider in the internal feedback path, and ..

    KC639H1109 | 2021-11-10