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total: 850/850 IP Cores
    • 대학·연구소 IP
    • P

    DC-DC Buck Converter Using Analog Coarse-Fine Self-Tracking Zero-Current Detection Scheme

    This paper proposes a DC-DC buck converter using an analog coarse-fine self-tracking zero-current detection (AST-ZCD) scheme. The AST-ZCD detects the zero-current by measuring the voltage level across a freewheeling transistor. It adjusts the nMOS turn-off time using an amplifier, capacitors, and current sources instea..

    KU127H1027 | 2020-01-14

    • 대학·연구소 IP
    • P

    Area-Efficient Bidirectional Shift-Register Using Bidirectional Pulsed-Latches

    The proposed bidirectional shift-register reduces the area and power consumption by replacing master-slave flip-flops and 2-to-1 multiplexers with the proposed bidirectional pulsed-latches and non-overlap delayed pulsed clock signals, and by using sub shift-registers and extra temporary storage latches.

    KU127H1026 | 2020-01-14

    • 대학·연구소 IP
    • P

    CW Lidar signal processing System IP

    CW Lidar signal processing IP consists of N-step digital filters. The described IP has the advantage of using a low number of sampling rate digital data and a low number of FFT points. By applying the CFAR algorithm to a digital signal that passed through the N-step digital filter, more accurate distance measur..

    KU349S1025 | 2019-12-20

    • 대학·연구소 IP
    • P

    Zoom FFT CW Lidar system IP

    FMCW Lidar system IP with variable point FFT and analog filter. The Beat Frequency is extracted from the transmit and receive waveforms and passed through an analog filter of N-step to perform Fourier Transform in the low band. Send the filtered analog signal to the FPGA to estimate the original Beat Frequency to o..

    KU349S1024 | 2019-12-19

    • 대학·연구소 IP
    • M

    MUSIC Algorithm for Radar Signal Processor

    This IP is the MUSIC algorithm for radar signal processor, which can detect target’s angle in high resolution. The MUSIC algorithm IP consists of pre-processor unit, covariance matrix (CMU), eigenvalue decomposition unit (EDU), and peak searching unit (PSU). This IP was designed in a hardware description language (H..

    KU128S1023 | 2019-12-16