uLDO IP is an LDO that receives 1.8V power and outputs a stable 0.9V voltage.
The load current capacity of this IP is 1mA, and it has a quiescent current of 500nA.
The output voltage is adjustable in 25mV steps. And the load regulation of uLDO IP is 0.74mV, and the start-up time is 0.8ms.
This IP is a CMOS voltage detector for SoC applications.
The device includes a comparator, a low-current reference, a divider, a hysteresis circuit, and an output driver.
The rising threshold voltage of POR 1.8V IP is 0.6V~1.5V, the hysteresis voltage can be changed from 50mV to 20mV step, and the assertion delay is..
Power-On Reset (POR) 0.9V IP provides a fixed-width reset pulse to initialize the chip after supplying power (0.9V).
When the supply power is applied to 0.6V, the reset signal is output. Hysteresis of threshold voltage is 50mV, and assertion delay is 50us.
POR 0.9V IP has low power operation characteristics of 2uA.
Power-On Reset (POR) 1.8V IP provides a fixed-width reset pulse to initialize the chip after supplying power (1.8V).
When the supply power is applied to 1V, the reset signal is output. Hysteresis of threshold voltage is 100mV, and assertion delay is 50us.
POR 1.8V IP has low power operation characteristics of 3uA.
HDMI 2.1/DisplayPort 1.4a Combo Transmitter PHY
The SPPHHTG2S08 is the HDMI 2.1/DisplayPort 1.4a transmitter PHY. It is a companion PHY IP for the SPLOHTG2 HDMI 2.1/DisplayPort 1.4a transmitter controller IP or third-party controller IP. Its registers are recommended to be accessed from the controller IP or the interposer IP from the SOC through Alphasolutions' prop..