8Ch 10Bit GPADC
This IP is the GPADC for TSMC 130nm MSRF G process.
The operating temperature is -40 to 125 degrees. The resolution of ADC is 10Bit.
The input supports 8 channels, with a maximum conversion rate of 10 MS/s.
DNL and INL are less than ± 1 LSB and turn-on time is less than 10us.
Power-On Reset (POR) 1.2V IP provides a fixed-width reset pulse to initialize the chip after supply power (1.2V).
When the supply power is applied to 1V, the reset signal is output. Hysteresis of threshold voltage is 50mV, and assertion delay is 20us.
POR 3.3V IP has low power operation characteristics of 2uA.
The DCDC 1A is an ultra fast response, high output current(1A), step down switched DC-DC regulator IP.
It is the best supply solution for high power power digital cores with fast activity variation.
Specially designed for SoC integration it uses advanced control techniques to achieve soft start-up, transient respons..
The PLL 3G IP is Clock Generator PLL that Widely programmable fractional-N delta sigma frequency synthesizer.
PLL 3G uses only RVT device to provide a clock with a maximum frequency of 3.5GHz.
It contains a 1-64 divider at the reference clock input, a 16-2000(Integer Mode) divider in the internal feedback path, and ..
This is a 32.768KHz crystal oscillator specifically designed for low power application.
This IP operates in 1.8V (AVDD) and 0.9V (DVDD) power sources.
The oscillator works in parallel resonant mode of the crystal.
When a 32.768KHz quartz crystal is connected to pins XIN32K and XOUT32K, the oscillator will output 3..